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FPGA Fun

Sat, 11/28/2009 - 03:15 — skinny

I'm playing with a FPGA starter kit board and decided to blog about my learning process. I got the board from Jared at Sharebrained, thanks! The board I have is a Spartan-3 Board from Digilient. It has a Xilinx FPGA on it. It also came with a JTAG-USB cable which could end up be useful with other projects?

First step is to get a dev environment set up so I can upload example code.

The steps are:

  1. Getting drivers for the JTAG cable
  2. Finding the compiler which will generate the binary
  3. Finding an example to run which will work with my board
  4. Uploading the example

Getting the drivers

Grab the drivers for the JTAG-USB cable here. This also contains the software you need to load binaries onto the board. It is called Adept. This is painless as long as the USB hub you are plugging into is actually powered on. ;)

Finding the compiler which will generate the binary

Download the WebPack from here. This is a slightly painful process that requires an account with Xilinx and a lot of harddrive space. But after it is installed it is no big deal.

Finding an example to run which will work with my board

There's a good tutorial here.

It's for an older version, but it is close enough to figure out the newer version. Just do section one, then in ISE select the project and in the processes pane, just run the "Generate Programming File" task.

Uploading the example

Finally, use Digilent Adept to upload the .bit file that is generated to the PROM. QED!

Random stuff I've learned:

  • The User Constraint File is the mechanism that maps the pins you define in VHDL to the pins on your board.
  • VHDL is a dataflow language (like PD!) which will take a little while to wrap my head around.

Next up, VGA output!


Comments

Sat, 11/28/2009 - 03:59 — earfeast

The first hit is free...

FPGAs are terribly addictive. So much power in such a small space...

Interesting you chose the VHDL route. I'd think with your C background, you'd like Verilog better that Ada-ish VHDL. But hey, VHDL definitely has its plusses, including a syntax that makes it a lot harder to cut yourself. Verilog, like C, has a lot of implied behavior as a result of its relatively terse syntax.

You know where to find me if you're scratching your head about something. Or you can send me your code-in-progress and I'll see if I can't make some educational suggestions.


Sun, 11/29/2009 - 01:23 — jmichael

FPGA-based logic analyzer...

One thing you could try playing around with is http://www.sump.org/projects/analyzer/. It's a logic analyzer that was built using a Spartan-3 starter board and looks like it'd be fun to play around with.

Just last week, I started seeing if I can get it working on the Spartan-3e board I've got, but I need to take some time to go through the .ucf file and fix up the pin differences between the -3 and -3e.